CODES FOR MASS MEMORIES
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St rip
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128 Binary bits Sync bits Odd parity bit
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Figure 11.11 Stripe data format. Source: [PATE80]. 1980 by International Business Machines Corporation; republished by permission.
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This code can also be expressed in binary form by way of the companion matrix T, an 8 8 matrix, obtained from the primitive polynomial of Eq. (11.23): 0 61 6 60 6 60 T 6 60 6 60 6 40 0 2 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 3 1 17 7 07 7 17 7: 07 7 17 7 05 0
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TAPE MEMORY CODES
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Codeword Section 14 13 12 11 0 B14-0 B13-0 B12-0 B11-0 1 B14-1 B13-1 B12-1 B11-1 2 B14-2 B13-2 B12-2 B11-2 3 B14-3 B13-3 B12-3 B11-3 4 B14-4 B13-4 B12-4 B11-4
Odd parity
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B14-k B13-k B12-k B11-k
15 P Sync P Sync P Sync P Sync 13 Data sections
B14-14 B14-15 B13-14 B13-15 B12-14 B12-15 B11-14 B11-15
. . .
Bj-0 Bj-1 Bj-2 Bj-3 Bj-4 Bj-k Bj-14 Bj-15 P Sync
. . .
2 1 0 B2-0 B1-0 B0-0 B2-1 B1-1 B0-1 B2-2 B1-2 B0-2 B2-3 B1-3 B0-3 B2-4 B1-4 B0-4 B2-k B1-k B0-k B2-14 B1-14 B0-14 B2-15 B1-15 B0-15 P Sync P Sync P Sync 2 Check sections
Figure 11.12 A segment of 15 sections formed with 16 interleaved codewords. Source: [PATE80]. 1980 by
International Business Machines Corporation; republished by permission.
The H matrix of this code is expressed as H I I I Tl I T2l ... ... I T14l ! ; 11:25
where I is an 8 8 identity matrix, and l is 68. This code has minimum distance 3, and therefore it can correct any single-byte error. The coding rules are given in the form of the following (modulo-2) equations: B0 B1 B2 . . . B14 0; B0 B1 Tl B2 T2l . . . B14 T14l 0: The encoding circuit for this MSS code is presented in Figure 11.13. The block diagram of the shift register can be derived from Eq. (11.24). As soon as the 13 data symbols have been shifted into the register, the parity-check symbols B0 and B1 are in the low- and highorder stages. Suppose that the i-th byte Bi is in error. Let Ei denote the error pattern. Then B0i Bi Ei : The syndrome can be obtained such that S 0 Ei ; S1 Ei Til : 11:26
CODES FOR MASS MEMORIES
1: Storage of field element. 2: Addition of field elements.
3 x
1+ 3
3: Multiplication by a field element.
Figure 11.13 Block diagram of encoding network. Source: [PATE80]. 1980 by International Business Machines
Corporation; reprinted by permission.
Thus the error pattern Ei is determined by the syndrome S0 . From these equations we further have S1 T il S0 Ei ; that is, S1 T 15 i l S0 Ei 11:28 11:27
because T15l I. Therefore the error byte position i is uniquely determined from the fact that either Eq. (11.27) or Eq. (11.28) is satis ed. Error correction is accomplished by adding S0 Ei to Bi . When the erroneous sections are indicated by external pointers, this information is passed on to the decoder in the form of error pointers. Let i and j denote the position values of two erroneous bytes in a codeword, where i < j. The error patterns Ei and Ej are errors in bytes Bi and Bj , respectively, so that B0i Bi Ei The syndrome can be obtained such that S 0 E i Ej ; S1 Ei Til Ej Tjl : Since i and j are known, the two simultaneous equations can be solved for the two unknown variables Ei and Ej , to obtain h i 1 Ej I T j i l S0 S1 T il and Ei S 0 Ej : and B0j Bj Ej :