BASE CONVERSION in Visual Studio .NET

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14.1 BASE CONVERSION
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n-bit adder
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Shift-and-add BCD to binary converter: elementary step.
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circuit to carry out the elementary step: Xbin (m j 1) (Xbin (m j):100 Xbin (m j)):10 X(m j 1): (14:8)
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Figure 14.4 presents a combinational (part (a)) and a sequential (part (b)) implementation circuit. The sequential circuit requires a multiplexer to initialize the process by loading the data XBCD(m 2 1). The cost C(m) and computation time T(m) of the combinational implementation of Figure 14.4a are C(m) 2:(m 1):Cadder (n), T(m) 2:(m 1):Tadder (n): (14:9)
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For the sequential implementation the computation time behavior is roughly the same while the cost C(n) is reduced to C(n) 2:Cadder (n) Cmux2 (n) CBCDreg (m 1) Cacc (n), Formula (14.3) for B2 10 and B1 2 gives m dn: log10 2e, that is, m=n % 0:3: (14:11) (14:10)
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Thus, comparing formulas (14.9) to (14.5), we nd better cost and computation time behaviors for the shift-and-add implementation. Moreover, the binary adder is simpler than the BCD adder-subtractor needed in the nonrestoring implementation of Section 14.1.2.1.
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OTHER ARITHMETIC OPERATORS
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xBCD (m 1)
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Step 1
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BCD shift register xm 2 xm 3
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0 0 . . .
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1 digit shift signal
n bit adder xBCD (0)
xbin(1) step (m 1)
n bit adder
xbin(0)
Shift-and-add BCD to binary converter.
Binary to BCD Converter
The binary-to-BCD conversion procedure described by Algorithm 7.3 basically consists in doubling the BCD partial result bcd(i) and adding the next bit from the binary expression to be converted. Two basic procedures have to be de ned: 1. Add a 1-bit number to a BCD number. 2. Multiplication by two of a BCD number. Since the binary digit x also stands for the BCD number 000x, the rst procedure is just a straight BCD sum. The multiplication by two is less straightforward for BCD numbers than for binary numbers (shift). The procedure BCDx2_step, described in 7, may be carried out in parallel on each BCD digit. Assuming that each digit is 1-bit left shifted, a carry is computed and set to 0 whenever the shifted digit is not greater than 9; otherwise the carry is set to 1 and a correction of (0110)2 is added modulo 16 to the shifted BCD digit. The computed carry can be used to feed the correction input of the mod 16 adder. Since the next left neighbor digit has also been 1-bit shifted, the carry will stand at the rightmost position of the next digit without generating carry propagation. The Boolean expression ( 7) y(i 1)0 x(i)3 _ (x(i)2 :(x(i)1 _ x(i)0 )) (14:12)
14.1 BASE CONVERSION
generates a carry y(i 1)0 0 whenever the BCD digit X(i) is not greater than 4, that is, (x(i)3 x(i)2 x(i)1 x(i)0 ) (0100),
y(i 1)0 1 otherwise. Figure 14.5a shows the carry circuit. Figure 14.5b displays the BCDx2_step circuit. The circuits of Figure 14.6 implement the full conversion process described in Algorithm 7.3. Observe that the rst three steps are trivial, so one can initialize the computation scheme with the partial result bcd(n 2 3) (0 xn21 xn22 xn23); the next partial results bcd(n 2 j) are then iteratively multiplied by two and added to (0 0 0 xn2j21). The cost C(n) and computation time T(n) of the combinational
(a) carry computation circuit
x(i)3 x(i)2 x(i)1 x(i)0
y (i+1) 0
(b) Y BCD = 2 XBCD
X(i+1) (3..0)
X(i) (3..0)
X(i 1) (3..0)
X(i+2) (2..0)
y (i+2) 0
X(i+1) (2..0)
y (i+1) 0
X(i) (2..0)
y (i) 0
Adder mod 16
Adder mod 16
Adder mod 16
Y (i+2)(3..0)
Y (i+1) (3..0)
Y (i)(3..0)
BCDx2_step implementation circuit.
0 xn 1 xn 2 xn 3
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BCDx2 0 2.bcd(n 3) m digit BCD adder
c 0 1
0 xn 4
( 0 xn 1 xn 2 xn 3)
BCDx2 0 2.bcd(n 4) m digit BCD adder BCDx2 0 0 0 xn j 1 2.bcd(n j) m digit BCD adder BCDx2 0 2.bcd(1) m digit BCD adder 0 0 x0 0 0 x n 5 acc