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Figure 46-6: HOL blocking at an input queued switch Figure 46-6 shows an example where two packets (red) at the front of their input queues are destined for the same upper right output port Suppose that the switch fabric chooses to transfer the packet from the front of the upper left queue In this case, the red packet in the lower left queue must wait But not only must this red packet wait, but so too must the green packet that is queued behind that packet in the lower left queue, even though there is no contention for the middle right output port (the destination for the green packet) This phenomenon is known as head-of-the-line (HOL) blocking in an input-queued switch - a queued packet in an input queue must wait for transfer through the fabric (even though its output port is free) due to the blocking of another packet at the head-of-the-line [Karol 1987] shows that due to HOL blocking, the input queue will grow to unbounded length (informally, this is equivalent to saying that significant packet loss will occur) as soon as packet arrival rate on the input links reaches only 58% of their capacity A number of solutions to HOL blocking are discussed in [McKeown 1997b]
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References
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[Cisco 1997a] Cisco Systems, "Queue Management," http://wwwciscocom/warp/public/614/ quemg_wphtm, 1997 [Cisco 1997b] Cisco Systems, Next Generation ClearChannel Architecture for Catalyst 1900/2820 Ethernet Switches, http://wwwciscocom/warp/public/729/c1928/nwgen_wphtm, 1997
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[Cisco 1998 a] Cisco Systems "Catalyst 8500 Campus Switch Router Architecture," http://wwwciscocom/warp/public/729/c8500/csr/8510_wphtm, 1998 [Cisco 1998b] Cisco Systems, "Cisco 12000 Series Gigabit Switch Routers," http://wwwciscocom/ warp/public/733/12000/12000_ovhtm, 1998 [Degemark 1997] M Degemark et al, "SMall Forwarding Tables for Fast Router Lookup," Proc 1997 ACM SIGCOMM Conference, (Canes, France, Sept 1997) [Doeringer 1996] W Doeringer, G Karjoth, M Nassehi, "Routing on Longest Matching Prefixes," IEEE/ACM Transactions on Networking, Vol 4, No 1 (Feb 1996), pp 86-97 [Giacopelli 1990] J Giacopelli, M Littlewood, WD Sincoskie Sunshine: A high performance selfrouting broadband packet switch architecture , 1990 International Switching Symposium [Gupta 1998] P Gupta, S Lin, NMcKeown Routing lookups in hardware at memory access speeds , Proc IEEE Infocom 1998, pp 1241-1248 [Kapoor 1997] H Kapoor, "CoreBuilder 5000 SwitchModule Architecture," http://www3comcom/ technology/tech_net/white_papers/500645html, 1997 [Karol 1987] M Karol, M Hluchyj, A Morgan, "Input Versus Output Queueing on a Space-Division Packet Switch," IEEE Transactions on Communications, Vol COM-35, No 12, pp 1347-1356, December 1987 [Keshav 1998] S Keshav, R Sharma, "Issues and Trends in Router Design," IEEE Communications Magazine, Vol 36, No 5 (May 1998), pp 144-151 [Microsoft 1998] Microsoft Corp, "Microsoft Routing and Remote Access Service for Windows NT Server 40], http://wwwmicrosoftcom/ntserver/basics/communications/basics/remoteaccess/routing/ defaultasp [McKeown 1997a] N McKeown, M Izzard, A Mekkittikul, W Ellersick, M Horowitz, The Tiny Tera: A Packet Switch Core , IEEE Micro Magazine, Jan-Feb 1997 [McKeown 1997b] N McKeown, "A Fast Switched Backplane for a Gigabit Switched Router," Business Communications Review, Vol 27 N0 12 [Partridge 1998] C Partridge et al A Fifty Gigabit per second IP Router , IEEE/ACM Transactions on Networking, 1998 [Tobagi 1990] F Tobagi, "Fast Packet Switch Architectures for Broadband Integrated Networks," Proc IEEE, Vol 78, No 1, pp 133-167 [Turner 1988] J S Turner Design of a Broadcast packet switching network , IEEE Trans Comm, June 1988, pp 734-743 [Feldmeier 1988] D Feldmeier, "Improving Gateway Performance with a Routing Table Cache," Proc 1988 IEEE Conference, (New Orleans LA, March 1988) [Thomson 1997] K Thomson, G Miller, R Wilder, "Wide Area Traffic Patterns and Characteristics," IEEE Network Magazine, Dec 1997 [Waldvogel 1997] M Waldvogel et al, "Scalable High Speed IP Routing Lookup," Proc 1997 ACM SIGCOMM Conference, (Canes, France, Sept 1997)
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