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The memory map, shown in Figure 82, is split into two separate 4-megabyte ranges The CE space contains all memory chips used as program and data storage for the runtime environment It also contains a 1-megabyte peripheral area for addressing high-speed devices that support a parallel bus interface A more detailed memory map of the CE space is contained in Figure 14 The primary difference between the CE and PCE signals is that the PCE signals can only be used for data reads and writes In other words, the microcontroller cannot fetch native code from memory devices that are enabled using the PCE signals This is why the ash ROM and static RAM used by the runtime environment are accessed using the CE signals The CE addresses correspond to true physical addresses in the microcontroller s memory map The starting address of memory enabled by PCE signals is somewhat arbitrary because it s a virtual address mapping Real PCE addresses actually overlap CE addresses This requires the microcontroller to change memory maps when transitioning from accessing devices mapped into CE space to accessing devices mapped into PCE space Applications accessing devices in PCE space don t need to worry about the details of this address map swapping because they are managed automatically by the parallel I/O driver However, the system designer should be aware that there is overhead associated with swapping between CE and PCE memory maps Data transfer rates on block move operations are about three times faster when only CE mapped devices are involved
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The DataPort Class
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TINI s runtime environment does not reserve any of the PCE space for peripheral devices This implies that all four PCE signals, and the four megabytes of address space they control, are wide open for system designers However, many high-speed peripheral devices are mapped into the CE3 address space because it can be accessed more ef ciently by the microcontroller If no devices are mapped into PCE space, the four PCE pins can be used as general purpose port pins The system designer is free to use the peripheral area either for interfacing hardware directly to the microcontroller s parallel bus or as general purpose TTL I/O but not both The topic of accessing the microcontroller s port pins is covered in 9
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Access to the parallel I/O bus is accomplished using the DataPort class de ned in the comdalsemisystem package A DataPort object provides a thin, but ef cient, encapsulation of the parallel bus It allows an application to control bus timings and read data from and write data to the bus
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public DataPort(int address)
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Parallel I/O
The address parameter of DataPort s constructor speci es the initial address for I/O operations The address must be in either of the following ranges [0x300000 0x3FFFFF] CE3 space [0x800000 0xBFFFFF] PCE0 PCE3 space
Note that only the last megabyte of CE space, enabled by CE3, can be used as a DataPort address The lower three megabytes, enabled by CE0 CE2, are reserved for code and data storage and are therefore owned by the operating system While all addresses in CE3 space are legal, two address ranges that should be avoided are those consumed by the Ethernet controller and real-time clock Ethernet controller address range [0x300000 0x307FFF] Real-Time clock 0x310000
A DataPort object can be used to transfer data to and from these devices, though it is not recommended The operating system3 assumes that it has exclusive access to these devices and their respective address ranges However, it is possible that some sophisticated networking applications may bene t from querying certain status registers in the Ethernet controller Note that DataPort s constructor does not throw an exception when passed an invalid address A DataPort object can be initialized with any address and the address can be changed at any time using the setAddress method
public void setAddress(int address)
However, any attempt to read from or write to an invalid address will result in an exception being thrown Parallel bus read and write operations are discussed in the next section