EXERCISES in .NET

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EXERCISES
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P where djr means the summation of d that divides r, m d is a Mobius function, and GCD x; y means the greatest common divisor of x and y [IMAI79]. 5.6 5.7 Prove that the Burton code has the properties 1 to 3 shown in Eqs. (5.7) to (5.9), respectively. Design the Fujiwara S4EC code with K 56 bits. Then, using this H matrix, obtain the rotational Fujiwara S4EC code with K 56 bits. In this case let the companion matrix T be de ned by the primitive polynomial x4 x 1. Find the generating submatrix H0 of the rotational Fujiwara S3EC code with K 180 bits. Design the Hong-Patel S2EC code with K 32 bits. Prove Theorem 5.7. Design the Kaneda-Fujiwara S4EC-D4ED code with K 128 bits. Design the modularized decoding circuit of the code shown in Figure 5.9. Assume that the code expressed by matrix H0 , which includes submatrix H0 having an all-I (identity element I 2 GF 2b ) row, is a k r b; kb SbEC-DbED code. Prove that the following code expressed by H is a 2-modularized 2k r 1 b; 2kb SbEC-DbED code:
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(I H = I H0 ... I) I I
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5.8 5.9 5.10 5.11 5.12 5.13
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I 0 0
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H= 0 0
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... H
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Here 0 H is a matrix whose order of row vectors in H0 is turned upside down. Use this code design method to design the 2-modularized S2EC-D2ED code with N 76 bits and K 64 bits. 5.14 5.15 Use Theorems 5.11 through 5.13 to design the Chen S3EC-D3ED code with K 183 bits. Use the conversion procedure to design the (33, 22) S3EC-D3ED code from the following H matrix with a normalized form of the (44, 32) S4EC-D4ED code: I H 40 0 2 0 I 0 0 I 0 I I I I T T2 I T2 T4 I T3 T6 I T4 T8 I T5 T10 I T6 T12 3 I T 7 5; T14
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CODES FOR HIGH-SPEED MEMORIES II: BYTE ERROR CONTROL CODES
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where I : identity element 2 GF 24 , 0 : zero element 2 GF 24 , T: companion matrix de ned by the primitive polynomial x4 x 1. 5.16 5.17 5.18 5.19 5.20 Prove Theorems 5.15 and 5.16. Verify that Table 5.11 satis es the relation (5.38). Use the conversion procedure shown in Subsection 5.2.3 to design the 224; 210 S4EC-S2 4=16 ED code. Prove Theorem 5.19. Using Table 5.11, determine ve sets of  for p 2 bytes and B=b 3 (b 4 bits, B 12 bits). Design the 120; 108 S4EC-S2 4=12 ED code. Answer : T14 ; T13 ; T8 ; O; T12 ; T9 ; T11 ; T7 ; T2 ; T6 ; T5 ; T4 , T10 ; T3 ; T : 5.21 Determine the table of elements satisfying the relation (5.38) for p 2 bytes and b 3 bits. Using this table, design the S3EC-S2 3=B ED code with B 9 bits and 12 bits. Here the 3 3 companion matrix T is de ned by the primitive polynomial g x x3 x 1. (Answer: Ta1 I T T T T T
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2 3 4 5 6
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Ta2 T
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T5 T T T
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T6 T
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T T T T T
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for B=b 3,  T6 , T5 , T3 and O; T4 ; T2 , and for B=b 4,  T6 ; T5 ; T3 ; I and O; T4 ; T2 ; T :) 5.22 Use Table 5.12 to design the 128; 112 S4EC-S3 4=16 ED code. (Hint: The sets of elements are obtained by the algorithm fO; T14 ; T12 ; T5 g, fT13 ; T11 ; T10 ; T2 g, fT9 ; T8 ; T6 ; T4 g, fT7 ; T3 ; T; Ig, where T is de ned by g x x4 x 1.) 5.23 As for the single-byte error correcting and adjacent double-byte error detecting (SbEC-ADbED) codes, do the following:
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