CODES FOR HIGH-SPEED MEMORIES II: BYTE ERROR CONTROL CODES in .NET

Insert QR Code ISO/IEC18004 in .NET CODES FOR HIGH-SPEED MEMORIES II: BYTE ERROR CONTROL CODES
CODES FOR HIGH-SPEED MEMORIES II: BYTE ERROR CONTROL CODES
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Figure 5.5 Matrix H R;b of Hong-Patel codes.
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The syndrome consists of r bytes called syndrome bytes. With the considerations above, we can now proceed to prove Lemma 5.2. First, any error byte in the information portion, say, error pattern Ei 6 0 in the i-th byte, gives the following syndrome: S 0 Ei and S1 ; S2 ; . . . ; Sr 1 Ei jTi jT : b Here note that jTi jb is an R b b matrix R ! 2b after deleting the last R b columns from the original R b R b matrix Ti , which will be de ned in De nition 6.4 as a slimmed matrix. Clearly, S0 Ei 6 0 and S1 ; S2 ; . . . ; Sr 1 6 0. The error byte in the check portion, however, gives the following syndromes: Let Ej 6 0 in the j-th check byte. Then Sl 0; l 6 j;
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Sj Ej 6 0: Hence an error in the information portion must give at least two types of nonzero syndromes, and an error in the check portion gives only one nonzero syndrome byte. Distinct errors in the check portion obviously yield distinct syndromes. Now suppose that byte errors Ei 6 0 and Ej 6 0 in the i-th and the j-th i 6 j information bytes generate identical syndromes. Then we have Ei Ej and Ei jTi jT Ej jTj jT : b b
SINGLE-BYTE ERROR CORRECTING (SbEC) CODES
Since Ti 6 Tj for i 6 j, this cannot occur. Therefore errors in information bytes have distinct syndromes and hence are correctable. Q.E.D. Lemma 5.3 errors: The code described by the following H matrix corrects all single-byte  !  0b 0b 0b  I R ;  H HR;b   H
R b;b
R ! 3b;
5:17
where 0b is a b b zero matrix. Proof Let the information portions corresponding to HR;b and HR b;b be called the rst and the second partition of information bytes. An error byte in the rst partition yields S0 6 0 and at least one more nonzero syndrome byte. An error byte in the second partition yields S0 0, S1 6 0, and at least one more nonzero syndrome byte. This is because HR b;b itself is a single-byte error correcting code having R b check bits. An error byte in the check portion yields one and only one nonzero syndrome byte. Distinct byte errors in the same partition yield distinct syndromes due to Lemma 5.2. Q.E.D. Lemma 5.3 suggests an iterative concatenation of partitions as de ned in Eq. 5:17 , maintaining the single-byte error correcting capability. From the two lemmas a new class of code can be de ned as the code given by the following H matrix:
0b 0b
0b 0b 0b 0b
0b 0b
0b 0b 0b 0b
. . .
0b 0b IR
5:18
H R ,b
H(R b),b H (R 2b),b H (2b + c), b
IR .
The second form shown above is to de ne r 1 partitions for the information portion. Each partition Pj contains b 2 r j 1 b c 1 columns. Theorem 5.5 The code de ned by the H matrix of Eq. (5.18) corrects all single-byte errors. Proof Any two distinct errors within a partition or within the check portion yield distinct syndromes due to Lemma 5.3. A single error E 6 0 in the i-th byte of partition Pj yields the syndrome S0 S1 Sj 1 0; Sj E; Sj 1 . . . Sr 1 E jTi jT 6 0; b
CODES FOR HIGH-SPEED MEMORIES II: BYTE ERROR CONTROL CODES
which is distinct from the syndrome of any single-byte error in another partition or in the check portion. Q.E.D. A few remarks about the structure of this code follow. 1. When b 1, the code length n (bits) becomes n