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Figure 4.15 VLANs provide for logical separation of devices on the same physical switch.
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Port 5 Port 1 Internal switch VLAN 101 Port 2 Port 6
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Internal switch VLAN 102 Port 3 Port 7
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Internal switch VLAN 103 Legend VLAN 101 VLAN 102 VLAN 103
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Hosts are typically not VLAN-aware (although Ethernet network card technology does exist to make hosts VLAN aware), and therefore no configuration is usually required on the hosts. The VLAN configuration is done when the switch and ports are assigned on a VLAN-by-VLAN basis. Another example may be useful to illustrate intra-VLAN communication. In Figure 4.16, Host 1 sends out a broadcast. Because Host 4 is the only other member of the VLAN, it is the only host to receive the broadcast (both hosts are in VLAN 101). The FDB entries behave much the same way in the VLAN model as they do in the standard switch model. The entries are updated based on the source address received on a given port. In Figure 4.16, the source address of the broadcast frame is only learned by VLAN 101 on the ingress port. The FDB for VLAN 102 will not know the source address of Host 1 after Host 1 transmits its broadcast packet. Therefore, in a VLAN environment, a separate FDB is kept for each VLAN. In this case, this means that the FDB for VLAN 101 will never learn about Host 3 or Host 2 and the FDB for VLAN 102 will never learn about Host 1 or Host 4.
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Figure 4.16 Only hosts in common VLANs can communicate with each other. Switch 1 will keep a separate FDB for both VLAN 101 and VLAN 102.
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These examples are very straightforward, but how do these principles apply when there are multiple switches Figure 4.17 illustrates three VLANs that are shared across multiple switches. Frames ingressing a port in a particular VLAN will only be allowed to egress a port on the same VLAN, regardless of the switch it exits. The VLANs can span across multiple switches because common VLAN information is configured on both Switch 1 and Switch 2. Note that in Figure 4.17, there are three physical links between Switch 1 and Switch 2, one for each VLAN. Of course, the problem with the design in Figure 4.17 is that it requires a separate physical link between the switches for each VLAN. That might be acceptable for two or three VLANs, but it is not a very scalable or practical solution. This is where VLAN trunking comes into play. VLAN trunking provides efficient interswitch forwarding of VLAN frames; it allows a single Ethernet port to carry frames from multiple VLANs instead of the one link per VLAN approach shown in Figure 4.17. This allows the use of a single high-bandwidth port, such as a gigabit Ethernet port or a LAG bundle, to carry the VLAN traffic between switches instead of one port per VLAN. The sharing of VLANs between switches is achieved by the insertion of a header or tag with a 12-bit VID, which allows for 212 = 4,094 possible VLAN destinations for each Ethernet frame. A VID must be assigned for each VLAN. Assigning the same VID to VLANs on different connected switches can extend the VLAN (broadcast domain) across a network.
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Figure 4.17 VLANs can be created across multiple switches. In this case, there is a separate physical interswitch link for each VLAN.
MAC FDB VLAN 101 MAC FDB VLAN 102 MAC FDB VLAN 103 Switch 1
Separate physical interfaces Switch 2
MAC FDB VLAN 101 MAC FDB VLAN 102 MAC FDB VLAN 103
Legend VLAN 101 VLAN 102 VLAN 103
When a frame is leaving a switch with another switch as its destination, the egress switch will tag the frames with a VID so that the ingress switch knows which VLAN the frame belongs to. The IEEE 802.1q standard governs the format of the assigned tag. The procedure works by inserting a 32-bit VLAN header into the Ethernet frame of all network traffic for a VLAN as it exits the egress switch. The VID uses 12 bits of the 32-bit VLAN header. The ingress switch then uses the VID to determine which FDB it will use to find the destination. After a frame reaches the destination switch port and before the frame is forwarded to the end destination, the VLAN header is removed. The use of a VLAN trunk is illustrated in Figure 4.18.