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// Get the iType and iValue fields for this // register from the thread context table iType = READ( &ContextTable[<reg-id>].iType ) iValue = READ( &ContextTable[<reg-id>].iValue ) // Now handle the cases and calculate the IF ( iType == OFFSET_FROM_SP ) RETURN READ( SP[iValue] ); ELSE IF( iType == OFFSET_FROM_STACK_TOP) RETURN READ( StackTop[-iValue] ); ELSE IF( iType == SP_PLUS_OFFSET) RETURN SP[iValue]; ELSE // Other case currently not used by OS RETURN Register Not Valid } // Read field <offset-tag> from <object> val READ(<object>, <offset-tag>) { offset = OffsetTable[<offset-tag>] pointer = <object> RETURN READ( pointer[offset] ) }
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Thread context by thread's User Context Type Thread Context Table kernel thread context table context table for threads blocked in Exec::WaitForRequest context table for threads in EXEC call context table for threads causing exception in mode_usr context table for threads preempted due to interrupt in mode_usr context table for threads preempted due to interrupt in mode_svc (Example thread context table) iType R0 EUndefined R1 EOffsetFromSp R2 ESpPlusOffset ... ... R14 EOffsetFromStackTop R15 EOffsetFromStackTop ... iValue R0 offset (N/A) R1 offset R2 offset ... ... R14 offset R15 offset ...
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where, EUndefined = 0, EOffsetFromSp = 1, EOffsetFromStackTop = 2, ESpPlusOffset = 3
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Figure 14.9 Thread context table and state
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KERNEL-SIDE DEBUG
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Note that in some states, the Symbian OS kernel exploits the conventions in the ARM-Thumb procedure call standard and thus not all registers in the thread s context will be saved. Typically, the argument registers (that is, R0 R3) are not saved because the caller throws those registers away so reading the thread context for these registers will return garbage values. This is harmless for user code, and it should be harmless for the debugger too. The debugger, if it has the capability, may choose not to show these registers at all.
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Memory of non-current threads
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Reading and writing to the current process s memory is straightforward the process s data will be mapped into its run address, and the host can follow all pointers relative to the current process directly. However, if the host wants to read and write to an address in a process that is not currently scheduled, it must take into account that the memory may not be available in the current address space, or may appear at a different logical address. The debugger must move to an address space in which the memory is available, and translate the process-relative pointer from its run address into an equivalent pointer in the new address space. The implementation is memory-model speci c. It is an equivalent operation to the DThread::RawRead() and DThread::RawWrite() methods that the kernel uses when transferring data between processes. To perform this operation, the debugger must understand how the kernel s memory model works. I will give a short description of the method for each memory model, and you can nd more detail in the stop-mode debugger integration guide. I describe the kernel s memory maps for the moving and multiple memory models in 7, Memory Models.
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14.5.3.1 Accessing memory of non-current threads under the multiple memory model
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The multiple memory model maintains a memory mapping for each process, and swaps between these address spaces at a reschedule. When the processor is halted, the debugger will have access to the memory of the current process and the kernel address space, but this will not contain mappings for any other process s memory. To access memory belonging to a non-current process, the host debugger has two options: Create a new temporary memory mapping exposing the memory from the non-current process, then translate the process-relative pointer to the new mapping Temporarily move to an address-space that already contains a mapping for the target memory.
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The former is the method used by the DThread::RawRead() and DThread::RawWrite() methods. For the host debugger, it is likely to be more practical to simply re-use the address space for the target process that is provided by the kernel. The host can change the address space by modifying the appropriate MMU registers. (For ARMv6 processors the debugger programs the ASID and TTBR with the values provided in the target DProcess object.) Once in the appropriate address space, the process-relative pointer can be used to access the memory.
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