PROCESSOR INVOLVEMENT IN COMMUNICATION in Visual Studio .NET

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PROCESSOR INVOLVEMENT IN COMMUNICATION
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The fth sub eld relates to the (direct) involvement and can take the following values:
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Communication in icts no computational involvement on the sending or receiving processor This implies that there is a dedicated communication subsystem is,r Communication in icts computational involvement on the sending and receiving processors Restrictions might be speci ed for the involvement in an obvious way as in the following examples {is , ir } Communication in icts computational involvement only on the sending (is ) or on the receiving processor (ir ) In other words, the communication type is one-sided i Communication in icts identical computational involvement on the sending and receiving processors, that is, is = ir = i
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So, unless both the fourth and the fth eld are empty, edges are also scheduled on the processors With these notations, the general problem of scheduling under the involvement contention model is speci ed by P, net, os,r , is,r | prec, cij -sched|Cmax for a limited number ( s second sub eld is empty) of homogeneous processors (P)
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83 ALGORITHMIC APPROACHES The integration of edge scheduling into task scheduling in order to achieve contention awareness had little to no effect on the fundamental scheduling methods, as was shown in 7 In contrast to scheduling on the links, the scheduling of the edges on the processors, which seems at rst a simple extension, has a strong impact on the operating mode of scheduling algorithms (Sinnen [172], Sinnen et al [180]) Essentially, the problem is that at the time a free node n is scheduled, it is generally unknown to where its successor nodes will be scheduled It is not even known if the corresponding outgoing communications will be local or remote Thus, no decision can be taken whether to schedule n s leaving edges on its processor or not Later, at the time a successor is scheduled, the period of time directly after node n might have been occupied with other nodes Hence, there is no space left for the scheduling of the corresponding edge The general issue behind the described problem is not speci c to a certain heuristic, for example, list scheduling, but it applies to all scheduling algorithms under the involvement contention model Also, scheduling under the LogP model faces the same problem with the scheduling of o for each communication (Kalinowski et al [98]) Ideally, the processor allocations of the nodes are known before the scheduling This problem does not arise in contention scheduling, because communication can overlap with computation; that is, an edge can be scheduled on a link at the same time a node is executed on the incident processor
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ALGORITHMIC APPROACHES
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Two different approaches to handle the described issue in scheduling under the involvement-contention model, which have reasonable complexity, can be distinguished: (1) direct scheduling and (2) scheduling based on a given processor allocation (Sinnen [172], Sinnen et al [180])
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831 Direct Scheduling Direct scheduling means that the processor allocation and the start/ nish time attribution of a node are done in one single step This is the dominant technique of most scheduling heuristics discussed so far Thus, the direct scheduling approach is basically an attempt to adapt the known scheduling techniques to the involvement contention model The essential question is when to schedule the edges on the processors It is clear that in direct scheduling (ie, a one-pass scheduling), the nodes considered for scheduling must be free Otherwise, the start time of a node cannot be determined and it has to be set in a later step of the algorithm In the rst attempt, the approach of list scheduling under the contention model is considered; that is, edges are scheduled at the same time as their destination nodes Scheduling Entering Edges Scheduling an edge together with its free destination node is surely the easiest approach At the time an edge is scheduled, the source and the destination processor are known and the route can be determined An edge can be scheduled in one go on the source processor, the links, and the destination processor Unfortunately, in many cases, this approach generates inef cient schedules
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Figure 810 In direct scheduling (a), edges are scheduled with their destination nodes; (b) the optimal schedule os,r (e, P) = 05, is,r (e, L) = 075 (e, L)
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