The make Utility and Dependencies in VS .NET

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If you've done any programming in C at all, you're almost certainly familiar with the idea of the make utility The make mechanism grew up in the C world, and although it's been adopted by many other programming languages and environments, it's never been adopted quite as thoroughly (or as nakedly) as in the C world What the make mechanism does is build executable program files from their component parts Like gcc, the make utility is a puppet master that executes other programs according to a master plan, which is a simple text file called a make file The make file (which by default is named "makefile") is a little like a computer program in that it specifies how something is to be done But unlike a computer program, it doesn't specify the precise sequence of operations to be taken What it does is specify what pieces of a program are required to build other pieces of the program, and in doing so ultimately defines what it takes to build the final executable file It does this by specifying certain rules called dependencies
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Throughout this book we've been looking at teeny little programs with a hundred lines of code or less In the real world, useful programs can take thousands, tens of thousands, or even millions of lines of source code (The current release of Linux represents about 10 million lines of source code, depending on how you define what's a "part" of Linux At last realizing that program bugs increase at least linearly with the size of a program's source code suite, Microsoft has stopped bragging about how many lines of code it took to create Windows NT In truth, I'm not sure I want to know) Managing such an immense quantity of source code is the central problem in software engineering Making programs modular is the oldest and most-used method of dealing with program complexity Cutting up a large program into smaller chunks and working on the chunks separately helps a great deal In ambitious programs, some of the chunks are further cut into even smaller chunks, and sometimes the various chunks are written in more than one programming language Of course, that creates the additional challenge of knowing how the chunks are created and how they all fit together For that you really need a blueprint A make file is such a blueprint In a modular program, each chunk of code is created somehow, generally by using a compiler or an assembler and a linker Compilers, assemblers, and linkers take one or more files and create new files from them An assembler, as you've learned, takes a asm file full of assembly language source code and uses it to create a linkable object code file or (in some cases) an executable program file You can't create the object code file without having and working with the source code file The object code file depends on the source code file for its very existence Similarly, a linker connects multiple object code files into a single executable file The executable file depends on the existence of the object code files for its existence The contents of a make file specify which files are necessary to create which other files, and what steps are necessary to accomplish that creation The make utility looks at the rules (called dependencies) in the make file and invokes whatever compilers, assemblers, and other utilities it sees are necessary to build the final executable or library file There are numerous flavors of make utilities, and not all make files are comprehensible to all make utilities everywhere The Unix make utility is pretty standard, however, and the one that comes with Linux is the one we'll be discussing here Let's take an example that actually makes a simple Linux assembly program Typically, in creating a make file, you begin by determining which file or files are necessary to create the executable program file The executable file is created in the link step, so the first dependency you have to define is which files the linker requires to create the executable file As I explained earlier in this chapter, under Linux the link step is handled for us by the GNU C compiler, gcc (Turn back to Figure 121 and the associated discussion if it's still fuzzy as to why a C compiler is required to link an assembly program) The dependency itself can be pretty simply stated: eatlinux: eatlinuxo
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All this says is that to generate the executable file eatlinux, we first need to have the file eatlinuxo The line is actually a dependency line written as it should be for inclusion in a make file In any but the smallest programs (such as this one) the linker will have to link more than one o file So this is probably the simplest possible sort of dependency: One executable file depends on one object code file If there are additional files that must be linked to generate the executable file, these are placed in a list, separated by spaces: linkbase: linkbaseo linkparseo linkfileo This line tells us that the executable file linkbase depends on three object code files, and all three of these files must exist before we can generate the executable file that we want Lines like these tell us what files are required, but not what must be done with them That's an essential part of the blueprint, and it's handled in a line that follows the dependency line The two lines work together Here's both lines for our simple example: eatlinux: eatlinuxo gcc eatlinuxo -o eatlinux The second line is indented by custom The two lines together should be pretty easy to understand: The first line tells us what file or files are required to do the job The second line tells us how the job is to be done: in this case, by using gcc to link eatlinuxo into the executable file eatlinux Nice and neat: We specify which files are necessary and what has to be done with them The make mechanism, however, has one more very important aspect: knowing whether the job as a whole actually has to be done at all
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